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| AP2312GN Pb Free Plating Product Advanced Power Electronics Corp. Capable of 2.5V gate drive Lower on-resistance Surface mount package S D N-CHANNEL ENHANCEMENT MODE POWER MOSFET BVDSS RDS(ON) ID 20V 50m 4.3A Description SOT-23 G Advanced Power MOSFETs utilized advanced processing techniques to achieve the lowest possible on-resistance, extremely efficient and cost-effectiveness device. The SOT-23 package is universally used for all commercial-industrial applications. D G S Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current , VGS @ 4.5V Continuous Drain Current , VGS @ 4.5V Pulsed Drain Current 1,2 3 3 Rating 20 12 4.3 3.4 10 1.38 0.01 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 90 Unit /W Data and specifications subject to change without notice 200920041 AP2312GN Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=250uA Min. 20 0.5 - Typ. 0.02 16 5 1 2.3 8 9 11 2 360 75 60 1.5 Max. Units 36 50 75 1.2 1 10 100 8 580 V V/ m m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=5A VGS=4.5V, ID=4A VGS=2.5V, ID=3A VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Rg Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=VGS, ID=250uA VDS=5V, ID=4A VDS=20V, VGS=0V VDS=16V ,VGS=0V VGS=12V ID=4A VDS=16V VGS=4.5V VDS=15V ID=1A RG=3.3,VGS=5V RD=15 VGS=0V VDS=20V f=1.0MHz f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance 2 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward On Voltage 2 Test Conditions IS=1.2A, VGS=0V IS=4A, VGS=0V, dI/dt=100A/s Min. - Typ. 16 8 Max. Units 1.2 V ns nC Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board , t <10sec ; 270 /W when mounted on Min. copper pad. AP2312GN 12 12 T A =25 o C ID , Drain Current (A) 8 ID , Drain Current (A) 5.0V 4.5V 3.5V 2.5V T A = 150 o C 8 5.0V 4.5V 3.5V 2.5V 4 4 V G =2.5V V G =2.5V 0 0 1 2 3 0 0 1 2 3 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 70 1.6 I D =3A 60 Normalized R DS(ON) T A =25 o C 1.4 ID=4A V G =5V RDS(ON) (m ) 1.2 50 1.0 40 0.8 30 0 2 4 6 8 10 0.6 -50 0 50 100 150 V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( C) o Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 1.8 4.0 T j =150 o C 2.0 T j =25 o C Normalized VGS(th) (V) 1.2 3.0 1.4 IS(A) 1.0 1.0 0.6 0.0 0 0.2 0.4 0.6 0.8 1 0.2 -50 0 50 100 150 V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( C) o Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature AP2312GN f=1.0MHz 12 1000 I D =4A VGS , Gate to Source Voltage (V) 10 C iss 8 6 C (pF) V DS =10V V DS =12V V DS =16V 100 C oss 4 C rss 2 0 0 2 4 6 8 10 10 1 5 9 13 17 21 25 Q G , Total Gate Charge (nC) V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Duty factor=0.5 Normalized Thermal Response (Rthja) 10 0.2 100us 1ms 0.1 0.1 ID (A) 0.05 1 10ms 100ms 0.1 PDM 0.01 t T 0.01 Single Pulse T A =25 o C Single Pulse Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja = 270/W 1s DC 0.01 0.1 1 10 100 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG 4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Circuit Fig 12. Gate Charge Circuit |
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